I met the same problem like this previous post:http://zedboard.org/content/tutorial-zedboard-hdmi-display-controller
but after I download the new license, and loaded it.The error : [Common 17-69]  still exists.What can I do?
regards
Tan

hi,

I am trying to download the Labs for Developing Zynq®-7000 All Programmable SoC Hardware, but the link seem to be broken, is there a way to fix this

thank you

I"ve logged in to the course

Introduction to Zynq®-7000 All Programmable SoC (ISE 14.2)
and
https://zedboard.org/course/developing-zynq%C2%AE-7000-all-programmable-...
on firefox and explorer and while the labs can be downloaded, none of the courses have video
 

Hi
Linux is booting up ok
I have test my app on QEMU simulation system.
I have got the warning belows when running the CMD:  "petalinux-boot --qemu --kernel".
 

INFO: The image provided is a zImage

WARNING: The QEMU subnet settings is 192.168.10.1/255.255.255.0. It is different from the one configured in PetaLinux /

WARNING: To enable the network of the QEMU MicroBlaze system. Please change the Network settings of PetaLinux and rebuild it or manually configure the network when the QEMU MicroBlaze system is boot

WARNING: Do you want to contine? (y/n)
 

y

INFO: TCP PORT is free 

INFO: Starting arm QEMU

INFO:  qemu-system-aarch64 -L /opt/pkg/petalinux/petalinux-v2015.4-final/etc/qemu -M arm-generic-fdt-plnx -machine linux=on  -net nic,vlan=1 -net tap,vlan=1,script=/opt/pkg/petalinux/petalinux-v2015.4-final/tools/common/petalinux/utils/petalinux-qemu-ifup -net nic,vlan=2 -net tap,vlan=2,script=/opt/pkg/petalinux/petalinux-v2015.4-final/tools/common/petalinux/utils/petalinux-qemu-ifup -net nic,vlan=3 -net tap,vlan=3,script=/opt/pkg/petalinux/petalinux-v2015.4-final/tools/common/petalinux/utils/petalinux-qemu-ifup -net nic,vlan=4 -net tap,vlan=4,script=/opt/pkg/petalinux/petalinux-v2015.4-final/tools/common/petalinux/utils/petalinux-qemu-ifup  -serial /dev/null -serial mon:stdio -display none -kernel /home/z/user/qemu/Avnet-Digilent-ZedBoard-2015.4/build/qemu_image.elf -gdb tcp::9000 -dtb system.dtb  -device loader,addr=0xf8000008,data=0xDF0D,data-len=4 -device loader,addr=0xf8000140,data=0x00500801,data-len=4 -device loader,addr=0xf800012c,data=0x1ed044d,data-len=4 -device loader,addr=0xf8000108,data=0x0001e008,data-len=4  

--------------------------------------------------------------------

Xilinx QEMU Dec 10 2015 13:38:20.

--------------------------------------------------------------------

INFO: Configuring tap0 for QEMU

INFO: Configuring tap1 for QEMU

INFO: Configuring tap2 for QEMU

INFO: Configuring tap3 for QEMU

Warning: hub port hub4port0 has no peer

Warning: vlan 4 with no nics

Warning: hub port hub3port0 has no peer

Warning: vlan 3 with no nics

Warning: netdev hub3port0 has no peer

Warning: netdev hub4port0 has no peer

Warning: requested NIC (anonymous, model unspecified) was not created (not supported by this machine?)

Warning: requested NIC (anonymous, model unspecified) was not created (not supported by this machine?)

Uncompressing Linux... done, booting the kernel.

Booting Linux on physical CPU 0x0

Linux version 4.0.0-xilinx (root@ubuntu) (gcc version 4.9.2 (Sourcery CodeBench Lite 2015.05-17) ) #3 SMP PREEMPT Thu Aug 10 00:17:50 PDT 2017

CPU: ARMv7 Processor [414fc091] revision 1 (ARMv7), cr=10c5387d

CPU: PIPT / VIPT nonaliasing data cache, VIPT nonaliasing instruction cache

Machine model: Avnet-Digilent-ZedBoard-2015.4

bootconsole [earlycon0] enabled

cma: Reserved 16 MiB at 0x1f000000

Memory policy: Data cache writealloc

PERCPU: Embedded 11 pages/cpu @debce000 s12672 r8192 d24192 u45056

Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 130048

Kernel command line: console=ttyPS0,115200 earlyprintk

PID hash table entries: 2048 (order: 1, 8192 bytes)

Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)

Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)

Memory: 492872K/524288K available (4759K kernel code, 223K rwdata, 1708K rodata, 3364K init, 208K bss, 15032K reserved, 16384K cma-reserved, 0K highmem)

Virtual kernel memory layout:

    vector  : 0xffff0000 - 0xffff1000   (   4 kB)

    fixmap  : 0xffc00000 - 0xfff00000   (3072 kB)

    vmalloc : 0xe0800000 - 0xff000000   ( 488 MB)

    lowmem  : 0xc0000000 - 0xe0000000   ( 512 MB)

    pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)

    modules : 0xbf000000 - 0xbfe00000   (  14 MB)

      .text : 0xc0008000 - 0xc0658efc   (6468 kB)

      .init : 0xc0659000 - 0xc09a2000   (3364 kB)

      .data : 0xc09a2000 - 0xc09d9de0   ( 224 kB)

       .bss : 0xc09d9de0 - 0xc0a0e0f4   ( 209 kB)

Preemptible hierarchical RCU implementation.

Additional per-CPU info printed with stalls.

RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.

RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2

NR_IRQS:16 nr_irqs:16 16

L2C: platform modifies aux control register: 0x00000000 -> 0x30400000

L2C: DT/platform modifies aux control register: 0x00000000 -> 0x30400000

L2C-310 errata 588369 769419 enabled

L2C-310 full line of zeros enabled for Cortex-A9

L2C-310 cache controller enabled, 8 ways, 64 kB

L2C-310: CACHE_ID 0x00000000, AUX_CTRL 0x00000000

slcr mapped to e0804000

zynq_clock_init: clkc starts at e0804100

Zynq clock init

sched_clock: 64 bits at 216MHz, resolution 4ns, wraps every 2537334505472ns

timer #0 at e0808000, irq=17

Console: colour dummy device 80x30

Calibrating delay loop... 1506.50 BogoMIPS (lpj=7532544)

pid_max: default: 32768 minimum: 301

Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)

Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)

CPU: Testing write buffer coherency: ok

CPU0: thread -1, cpu 0, socket 0, mpidr 80000000

Setting up static identity map for 0x481788 - 0x4817e0

CPU1: thread -1, cpu 1, socket 0, mpidr 80000001

Brought up 2 CPUs

SMP: Total of 2 processors activated (3133.44 BogoMIPS).

CPU: WARNING: CPU(s) started in wrong/inconsistent modes (primary CPU mode 0x13)

CPU: This may indicate a broken bootloader or firmware.

devtmpfs: initialized

VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 0

pinctrl core: initialized pinctrl subsystem

NET: Registered protocol family 16

DMA: preallocated 256 KiB pool for atomic coherent allocations

cpuidle: using governor ladder

cpuidle: using governor menu

zynq_get_revision: no devcfg node found

hw-breakpoint: debug architecture 0x4 unsupported.

vgaarb: loaded

SCSI subsystem initialized

usbcore: registered new interface driver usbfs

usbcore: registered new interface driver hub

usbcore: registered new device driver usb

media: Linux media interface: v0.10

Linux video capture interface: v2.00

pps_core: LinuxPPS API ver. 1 registered

pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>

PTP clock support registered

EDAC MC: Ver: 3.0.0

Advanced Linux Sound Architecture Driver Initialized.

Switched to clocksource arm_global_timer

NET: Registered protocol family 2

TCP established hash table entries: 4096 (order: 2, 16384 bytes)

TCP bind hash table entries: 4096 (order: 3, 32768 bytes)

TCP: Hash tables configured (established 4096 bind 4096)

TCP: reno registered

UDP hash table entries: 256 (order: 1, 8192 bytes)

UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)

NET: Registered protocol family 1

RPC: Registered named UNIX socket transport module.

RPC: Registered udp transport module.

RPC: Registered tcp transport module.

RPC: Registered tcp NFSv4.1 backchannel transport module.

futex hash table entries: 512 (order: 3, 32768 bytes)

jffs2: version 2.2. (NAND) (SUMMARY)  © 2001-2006 Red Hat, Inc.

io scheduler noop registered

io scheduler deadline registered

io scheduler cfq registered (default)

zynq-pinctrl 700.pinctrl: zynq pinctrl initialized

dma-pl330 f8003000.dmac: Loaded driver for PL330 DMAC-241330

dma-pl330 f8003000.dmac: DBUFF-256x8bytes Num_Chans-8 Num_Peri-4 Num_Events-16

e0001000.serial: ttyPS0 at MMIO 0xe0001000 (irq = 25, base_baud = 992063) is a xuartps

console [ttyPS0] enabled

console [ttyPS0] enabled

bootconsole [earlycon0] disabled

bootconsole [earlycon0] disabled

[drm] Initialized drm 1.1.0 20060810

brd: module loaded

loop: module loaded

m25p80 spi0.0: s25fl256s1 (32768 Kbytes)

4 ofpart partitions found on MTD device spi0.0

Creating 4 MTD partitions on "spi0.0":

0x000000000000-0x000000500000 : "boot"

0x000000500000-0x000000520000 : "bootenv"

0x000000520000-0x000000fa0000 : "kernel"

0x000000fa0000-0x000002000000 : "spare"

CAN device driver interface

libphy: MACB_mii_bus: probed

mdio_bus e000b000.etherne: /amba/ethernet@e000b000/mdio has invalid PHY address

mdio_bus e000b000.etherne: scan phy mdio at address 0

mdio_bus e000b000.etherne: scan phy mdio at address 1

mdio_bus e000b000.etherne: scan phy mdio at address 2

mdio_bus e000b000.etherne: scan phy mdio at address 3

mdio_bus e000b000.etherne: scan phy mdio at address 4

mdio_bus e000b000.etherne: scan phy mdio at address 5

mdio_bus e000b000.etherne: scan phy mdio at address 6

mdio_bus e000b000.etherne: scan phy mdio at address 7

mdio_bus e000b000.etherne: scan phy mdio at address 8

mdio_bus e000b000.etherne: scan phy mdio at address 9

mdio_bus e000b000.etherne: scan phy mdio at address 10

mdio_bus e000b000.etherne: scan phy mdio at address 11

mdio_bus e000b000.etherne: scan phy mdio at address 12

mdio_bus e000b000.etherne: scan phy mdio at address 13

mdio_bus e000b000.etherne: scan phy mdio at address 14

mdio_bus e000b000.etherne: scan phy mdio at address 15

mdio_bus e000b000.etherne: scan phy mdio at address 16

mdio_bus e000b000.etherne: scan phy mdio at address 17

mdio_bus e000b000.etherne: scan phy mdio at address 18

mdio_bus e000b000.etherne: scan phy mdio at address 19

mdio_bus e000b000.etherne: scan phy mdio at address 20

mdio_bus e000b000.etherne: scan phy mdio at address 21

mdio_bus e000b000.etherne: scan phy mdio at address 22

mdio_bus e000b000.etherne: scan phy mdio at address 23

mdio_bus e000b000.etherne: scan phy mdio at address 24

mdio_bus e000b000.etherne: scan phy mdio at address 25

mdio_bus e000b000.etherne: scan phy mdio at address 26

mdio_bus e000b000.etherne: scan phy mdio at address 27

mdio_bus e000b000.etherne: scan phy mdio at address 28

mdio_bus e000b000.etherne: scan phy mdio at address 29

mdio_bus e000b000.etherne: scan phy mdio at address 30

mdio_bus e000b000.etherne: scan phy mdio at address 31

macb e000b000.ethernet eth0: Cadence GEM rev 0x00020118 at 0xe000b000 irq 27 (00:0a:35:00:1e:53)

macb e000b000.ethernet eth0: attached PHY driver [Marvell 88E1111] (mii_bus:phy_addr=e000b000.etherne:00, irq=-1)

e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k

e1000e: Copyright(c) 1999 - 2014 Intel Corporation.

ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver

ehci-pci: EHCI PCI platform driver

usbcore: registered new interface driver usb-storage

e0002000.usb supply vbus not found, using dummy regulator

ULPI transceiver vendor/product ID 0x0424/0x0004

ULPI integrity check: passed.

ci_hdrc ci_hdrc.0: doesn't support gadget

ci_hdrc ci_hdrc.0: EHCI Host Controller

ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 1

ci_hdrc ci_hdrc.0: USB 2.0 started, EHCI 1.00

hub 1-0:1.0: USB hub found

hub 1-0:1.0: 6 ports detected

mousedev: PS/2 mouse device common for all mice

i2c /dev entries driver

Xilinx Zynq CpuIdle Driver started

Driver 'mmcblk' needs updating - please use bus_type methods

sdhci: Secure Digital Host Controller Interface driver

sdhci: Copyright(c) Pierre Ossman

sdhci-pltfm: SDHCI platform and OF driver helper

ledtrig-cpu: registered to indicate activity on CPUs

usbcore: registered new interface driver usbhid

usbhid: USB HID core driver

TCP: cubic registered

NET: Registered protocol family 17

can: controller area network core (rev 20120528 abi 9)

NET: Registered protocol family 29

can: raw protocol (rev 20120528)

can: broadcast manager protocol (rev 20120528 t)

can: netlink gateway (rev 20130117) max_hops=1

zynq_pm_ioremap: no compatible node found for 'xlnx,zynq-ddrc-a05'

zynq_pm_late_init: Unable to map DDRC IO memory.

zynq_pm_remap_ocm: no compatible node found for 'xlnx,zynq-ocmc-1.0'

zynq_pm_suspend_init: Unable to map OCM.

Registering SWP/SWPB emulation handler

/opt/pkg/petalinux/petalinux-v2015.4-final/components/linux-kernel/xlnx-4.0/drivers/rtc/hctosys.c: unable to open rtc device (rtc0)

ALSA device list:

  No soundcards found.

Freeing unused kernel memory: 3364K (c0659000 - c09a2000)

INIT: version 2.88 booting

Creating /dev/flash/* device nodes

random: dd urandom read with 0 bits of entropy available

Starting internet superserver: inetd.

update-rc.d: /etc/init.d/run-postinsts exists during rc.d purge (continuing)

 Removing any system startup links for run-postinsts ...

  /etc/rcS.d/S99run-postinsts

INIT: Entering runlevel: 5

Configuring network interfaces... udhcpc (v1.23.1) started

Sending discover...

macb e000b000.ethernet eth0: link up (1000/Full)

Sending discover...

Sending discover...

No lease, forking to background

done.

Built with PetaLinux v2015.4 (Yocto 1.8) Avnet-Digilent-ZedBoard-2015_4 /dev/ttyPS0

Another problem is that eth0  have no response and forking to background.  
I have highlighted these two logs. Could you please help to resolve it. 
Thanks very much.

Hello Everyone,

For anyone looking to duplicate a Virtual Machine created with the VirtualBox and Linux VM Installation Guides provided by Avnet, here is some helpful guidance passed along to us by our Processor Specialists in the field. They discovered it when creating a second virtual machine using an existing virtual disk, albeit with a different name. When copying the Virtual Disk Image (.vdi file) to a new filename, you will find that the UUID needed to change for the copied .vdi file in order to coexist with the original in Virtual Box.

Instructions on how to change a VirtualBox virtual hard disk file ID:

1. cd ---path to folder containing VBoxManage command---
2. Use the VBoxManage command with the arguments "internalcommands sethduuid ---path to disk image---"

Here is an example which may help:

"C:\Program Files\Oracle\VirtualBox\VBoxManage.exe" internalcommands sethduuid "C:\Users\030876\VirtualBox VMs\Ubuntu 16.04 MiniZed PetaLinux Speedway\Ubuntu 16.04 MiniZed PetaLinux Speedway.vdi"

According to the help for the VBoxManage command, this will:

"Assigns a new UUID to the given image file. This way, multiple copies of a container can be registered."

Best Regards,

-Kevin

The student is asked to review the zynqHW hardware Platform Specification, then calculate the size of the QSPI Flash memory.
According to the address map, there are 0x1000000 addresses mapped to this memory, or 16 M addresses.
What I don't follow is why (according to the solution) each address represents 8 bits of data, making the mapped Flash space 128 Mbit.
 
 

hi,

The 'dma_test.c' app for testing DMA transfers between different memories of Microzed works after completing the 'Developing Zynq®-7000 All Programmable SoC Hardware' training lab 6, using Vivado 2016.2. But, when running the same application after completing lab 7, the software halts when BRAM to BRAM transfer is selected. Any ideas on why this happens?

Best,

metso

Hello
I tried to setup MiniZed Platform on SDx 2017.4 according to Avnet MiniZed SDSoC Platform Install instructions.
 
But, I faced problem in "Experiment 3".
SDx failed to building Matrix Multiply Project with the following error messages.
 
What's a cause of this build error?
Does anyone help me?
 

Create board support package library

Link application ELF file

C:/Xilinx/SDx/2017.4/target/aarch32-none/lib\libsds_lib.a(xlnk-core-dma-standalone.o): In function `xlnkSetUpRing.constprop.2':

xlnk-core-dma-standalone.c:(.text+0x28): undefined reference to `XAxiDma_BdRingSetCoalesce'

xlnk-core-dma-standalone.c:(.text+0x60): undefined reference to `XAxiDma_BdRingCreate'

xlnk-core-dma-standalone.c:(.text+0x80): undefined reference to `XAxiDma_BdRingClone'

xlnk-core-dma-standalone.c:(.text+0x90): undefined reference to `XAxiDma_BdRingStart'

C:/Xilinx/SDx/2017.4/target/aarch32-none/lib\libsds_lib.a(xlnk-core-dma-standalone.o): In function `xlnkDMASubmit':

xlnk-core-dma-standalone.c:(.text+0x3d0): undefined reference to `XAxiDma_BdRingAlloc'

xlnk-core-dma-standalone.c:(.text+0x44c): undefined reference to `XAxiDma_BdSetBufAddr'

xlnk-core-dma-standalone.c:(.text+0x464): undefined reference to `XAxiDma_BdSetLength'

xlnk-core-dma-standalone.c:(.text+0x48c): undefined reference to `XAxiDma_BdSetAppWord'

xlnk-core-dma-standalone.c:(.text+0x4b8): undefined reference to `XAxiDma_BdSetAppWord'

xlnk-core-dma-standalone.c:(.text+0x4d8): undefined reference to `XAxiDma_BdSetCtrl'

xlnk-core-dma-standalone.c:(.text+0x53c): undefined reference to `XAxiDma_BdRingToHw'

C:/Xilinx/SDx/2017.4/target/aarch32-none/lib\libsds_lib.a(xlnk-core-dma-standalone.o): In function `xlnkDMAWait':

xlnk-core-dma-standalone.c:(.text+0x8d8): undefined reference to `XAxiDma_BdRingFromHw'

xlnk-core-dma-standalone.c:(.text+0x8fc): undefined reference to `XAxiDma_BdRingFree'

xlnk-core-dma-standalone.c:(.text+0x944): undefined reference to `XAxiDma_BdRingFromHw'

C:/Xilinx/SDx/2017.4/target/aarch32-none/lib\libsds_lib.a(xlnk-core-dma-standalone.o): In function `xlnkDmaRegister':

xlnk-core-dma-standalone.c:(.text+0xb14): undefined reference to `XAxiDma_CfgInitialize'

collect2.exe: error: ld returned 1 exit status

ERROR: [SdsCompiler 83-5019] Exiting sds++ : Error when calling 'arm-none-eabi-g++ -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -Wl,--build-id=none -specs=C:/Xilinx/SDx/2017.4/data/toolchain/aarch32-none.spec -Wl,-T -Wl,C:/Avnet/platforms/mz_avnet/sw/config0/lscript.ld  C:/Avnet/SDx_workspace/MiniZedMM/Debug/_sds/swstubs/mmult.o C:/Avnet/SDx_workspace/MiniZedMM/Debug/_sds/swstubs/main.o   -L C:/Avnet/SDx_workspace/MiniZedMM/Debug/_sds/swstubs/standalone_bsp/ps7_cortexa9_0/lib  -L C:/Xilinx/SDx/2017.4/target/aarch32-none/lib -LC:/Avnet/SDx_workspace/MiniZedMM/Debug/_sds/swstubs -Wl,--start-group -lxilffs -lgcc -lc -lstdc++ -Wl,--end-group -Wl,--start-group   -lxilffs -lxil -lgcc -lc  -lsds_lib -lxlnk_stub -lgcc -lc -Wl,--end-group -o C:/Avnet/SDx_workspace/MiniZedMM/Debug/_sds/swstubs/MiniZedMM.elf'

sds++ log file saved as C:/Avnet/SDx_workspace/MiniZedMM/Debug/_sds/reports/sds.log

ERROR: [SdsCompiler 83-5004] Build failed
 
Thank you.   

Hello there
I'm trying to try the zedboard tutorial (Zynq-7000 AP SoC Concepts, Tools and Techniques), and for the tutorial 3, where we implement an SoC with both PS and PL, and connect two of the push buttons BTNU, BTNR to control axi gpio and ps, none of it is recognized for some reason. I tried push it longer and really fast, both not recognized. 
The constraint file was so simple I really don't know which part went wrong. 

set_property PACKAGE_PIN M15 [get_ports BTNU]

set_property PACKAGE_PIN R18 [get_ports BTNR]

set_property IOSTANDARD LVCMOS25 [get_ports BTNR]

set_property IOSTANDARD LVCMOS25 [get_ports BTNU]

Best

Yuting

I have Vivado 2017.4 and a MicroZed Z7020 board.  I wanted to run the MicroZed tutorials, but the latest versions available are for Vivado 2016.4, so I am trying them.  Tutorials 1-3 work fine, but there is an issue within the FSBL tutorial (#4).  On page 11 where I try to program the QSPI via Xilinx -> Program Flash, I get an error message in the Program Flash Memory window that says the FSBL file is mandatory with Zync devices.  The tutorial says nothing about this - the entry box for FSBL file is empty.  I could only find one .ELF file in my project directory and I tried using that, but then I got a console message saying that the programming attempt failed.  How do I get past this problem?

The online, on-demand MiniZed SpeedWay courses are now available. See the press release below.

http://news.avnet.com/press-release/avnet/avnets-minized-speedway-design-workshop-videos-now-available-demand

The courses can be found here:

http://minized.org/support/trainings-and-videos

Bryan

Escorts girl  provide you the finest and sexiest escorts that you can afford easily,
So don't think just visit Our  escorts girls are available in all top hotels including 2*3*4*5* of your location. We provide celebrity escorts, model escorts , independent escorts , high profile escorts , housewife escorts and book a hot Escort in today.
You can also visit our official website.
http://www.kolkataescortsgirl.com/
http://www.anjali-khanna.in/
http://www.shruthikapoor.com/
http://www.escortsinranchi.com/
http://www.vipcallgirlsinranchi.com/
http://www.jessicajoshi.com/
http://www.punevipgirls.com/
http://www.hotladki.com/
http://www.mumbaihotelescorts.com/
http://www.raajescorts.com/
http://www.rajescortservice.com/
http://www.eillensharma.com/
http://www.bluelovenight.com/
http://gurgaon.bluelovenight.com/
http://noida.bluelovenight.com/
http://www.firstnightlove.com/
http://www.leatherescort.com/
http://www.lovefirstnight.com/
http://www.callgirlsinjammu.com/
http://www.escortinchandigarh.com/
http://www.escortchandigarh.com/
http://www.sabnamparveen.com/

I"ve logged in to the course

Introduction to Zynq®-7000 All Programmable SoC (ISE 14.2)
and
https://zedboard.org/course/developing-zynq%C2%AE-7000-all-programmable-...
on firefox and explorer and while the labs can be downloaded, none of the courses have video
 

Dear all;

I am a PhD student, I have to implement the PWM control technique on the Zedboard as a final stage of my thesis.

As I am a beginner with FPGAs, I have been advised to try Simulnik (HDL coder) but the fixed point problem always embarrassed me.

I am now a little familiar with Xilinx tools (Vivado 2016 and SDK 2017), all what I have done till now is to send signals to the JA1. As I intend to send PWM signals through the Pmod pins.

namely PWM: Pulse Width Modulation is a classic technique used to control inverters.

Please help, any suggestions of how can I bring up the thematic efficiently and in short time ( I run off time) are deeply appreciated and welcome.

Best regards,
 

Hello,
 
I'm trying to understand how the address setup works in the Lab4 of the workshop 2017: 
https://www.xilinx.com/support/university/vivado/vivado-workshops/Vivado-adv-embedded-design-zynq.html
 
 
It seems 'working' but the way it setup the transfer source/destination address is little confusing:
 

#define PROCESSOR_BRAM_MEMORY 0x80000000 // BRAM Port A mapped through 1st BRAM Controller accessed by CPU
#define CDMA_BRAM_MEMORY 0xC0000000 // BRAM Port B mapped through 2nd BRAM Controller accessed by CDMA
#define DDR_MEMORY 0x01000000
let's say the option 1 selected as "  "
 
 

case '1' :
// case '2' :
source = (u8 *)PROCESSOR_BRAM_MEMORY;
cdma_memory_source = (u8 *)CDMA_BRAM_MEMORY;
destination = (u8 *)DDR_MEMORY;
cdma_memory_destination = (u8 *)DDR_MEMORY;
print("BRAM to DDR transfer\r\n");
break;
the 'source' and 'destination' buffer initilized (cleared destination after non-DMA trial) as :
 
 

// Initialize src memory
for (i=0; i<numofbytes; i++)
*(source+i) = numofbytes-i;

// clear destination memory
for (i=0; i<numofbytes; i++)
*(destination+i) = 0;
 after started a polling mode DMA transfer: note with src/dest as "cdma_memory_source/cdma_memory_destination ", NOT "sourc e/destination" already setup, 
 
the 'destination' buffer is compared against the 'source'  to see 'match' or not; if match then DMA succeeded -- WHY? (unless 'source' and 'cdma_memory_source the same; and "destination" and "cdma_memory_destnation" the same too)
 

// DMA in polling mode
XAxiCdma_IntrDisable(&xcdma, XAXICDMA_XR_IRQ_ALL_MASK);
print("Starting transfer through DMA in poll mode\r\n");
// reset timer
XScuTimer_RestartTimer(TimerInstancePtr);
Status = XAxiCdma_SimpleTransfer(&xcdma, (u32) cdma_memory_source, (u32) cdma_memory_destination, numofbytes, NULL, NULL);

if (Status != XST_SUCCESS) {
CDMA_Status = XAxiCdma_GetError(&xcdma);
if (CDMA_Status != 0x0) {
XAxiCdma_Reset(&xcdma);
xil_printf("Error Code = %x\r\n",CDMA_Status);
}
return XST_FAILURE;
}

while (XAxiCdma_IsBusy(&xcdma)); // Wait
CntValue1 = XScuTimer_GetCounterValue(TimerInstancePtr);

CDMA_Status = XAxiCdma_GetError(&xcdma);
if (CDMA_Status != 0x0) {
XAxiCdma_Reset(&xcdma);
xil_printf("Error Code = %x\r\n",CDMA_Status);
}
else {
xil_printf("Moving %d bytes through DMA in poll mode took %d clock cycles\r\n", numofbytes, TIMER_LOAD_VALUE-CntValue1);
print("Transfer complete\r\n");
polled_cycles = TIMER_LOAD_VALUE-CntValue1;
Error = 0; // reset for interrupt mode transfer
}

for (i = 0; i < numofbytes; i++) {
if ( destination[i] != source[i]) {
xil_printf("Data match failed at = %d, source data = %x, destination data = %x\n\r",i,source[i],destination[i]);
break;
}
}
print("Transfered data verified\r\n");
 
note: the "destination" and "cdma_memory_destination" actually point to the same block (0x0100 0000) . The transfer  is a 'success'.
BUT the "source" and "cdma_memory_source" pointed to different blocks. Although the "destination" block indeed resulted in the same as "source", but contents of  the "cdma_memory_source" (starting from address 0xC000 0000) shown as "?" in debug mode. 
How does the CDMA transfer get the data from 'source; instead of 'cdma_memory_source"? , or 
the memory block starting from 0xC000 0000 is not 'visible' in SDK debug mode???
 
 
 

I am working through the ZyncSW labs and in Lab08, step 4, the tutorial asks to store the Run and Debug Configurations that were "previously created.
After selecting file-> Export and Run/Debug -> Launch configurations then clicking next, and creating the C:/Speedway/ZynqSW/2016.2/Lab08_config_export folder and selecting all the configurations the Finish button is still greyed out.  
What is missing to enable this?

I am using PicoZed 7030 SOM + FMC Carrier V1 board and I am trying the tutorials for the Picozed. I am currently in the second one and I am trying to program my board but the board doesn;t open as seen in pdf. The first set of leds are 3 red and 2 green on and SDK can't program fpga. I put the sw1 correct and i am using only one usb cable connected to usb - uart port. Any guests?
Thank you!

I am using PicoZed 7030 SOM + FMC Carrier V1 board and I am trying the tutorials for the Picozed. I am currently in the second one and I am trying to program my board but the board doesn;t open as seen in pdf. The first set of leds are 3 red and 2 green on and SDK can't program fpga. I put the sw1 correct and i am using only one usb cable connected to usb - uart port. Any guests?
Thank you!

I'm just starting out here with my MicroZed board. I'm initially walking through the "Creating a Hardware Design", and "Helloworld" tutorials first. Still have a little bit to go. However, these don't consist of running Linux. My understanding (CORRECT ME IF I'M WRONG) is the "Helloworld" tutorial is a bare metal programming example.

I would like to start my next set of tutorials on PetaLinux because we use it quite frequently here at work. My board came with a micro SD card for pulsar linux which is a Wind River product. I may still walk through the tutorial for that as well but was hoping someone could point me to a tutorial involving PetaLinux.
I would like to follow a tutorial that can relate as close to the environment of which I'm using. I realize everyone uses a slightly different environment but if you have any suggestions on tutorials that would be friendly enough to following along it would be much appreciated.

My Environment
OS: Centos 7
Vivado 2018
MicroZed Board 7010 model